MAX10DD devices seem to not support ADC Blocks ?!?

sorry, the line should read:

If i target a 10M50DA device ("DA" vs. "DD"), it allows the ADC IP to be generated no problem.

sorry about that.

Hello,

I am really sorry for the experience you had. May I know if you okay to share your design to me either by private or if it is simple design and you don't mind you can share it here.

I need the .qar file to replicate the issue from my side for further escalation if needed.

Regards,

Aqid

here is a basic project archive. it has nothing in it except an "adc_bad" qsys file. when you open it in platform designer, you'll see that it says the DD device is not supported, and you can't generate HDL due to that error.

if you re-target to a device with suffix DA, it doesn't complain.

thanks

Hello,

Thank you for the design file. What Quartus version that you are using?

Quartus Prime Version 22.1 std.0 build 915 10/25/2022 SC Lite Edition

Patches Installed: None

this is a windows version. we've had similar issues on 20.1 on Linux

Okay, thank you for the information and the design file. I will escalate this issue to the internal team. I will update you back once I got any feedback on this.

Any update on this issue?

I am using the 10M40DD part and have the same problem. Fails to compile with Quartus version 23.1.std

Error (12252): Adc.modular_dual_adc_0: The selected device part number 10M40DDF256I7G does not support ADC

this really shouldn't be a difficult question to answer. i see only two options:

1. the "DD" variant does not not support ADC (documentation error)

2. it does support it but there's a bug in Quartus/Platform Designer.

we were hoping to take advantage of the flash options of the "DD" version, but we intend to use the ADC as well.

we are getting close to ordering components for our program for prototype PCBs, so we really need to know the answer. If it is, the first above, we will just switch to the "DA" flavor and forgo the flash benefits.

if it is the second choice above, we would need to know when a patch or variable setting or whatever would be available. if it is too far in the future, we'd likely switch to the DA part as well.

Hi,

There is still investigation going on for this issue in Quartus.

Max 10 with "DD" variant should be the same as "DA" variant but with the additional "flash access control" feature. So, it should have the ADC feature.

This is likely to be the number 2 options.

I will definitely update back to you once I got the timeline to avoid this error.

Regards,

Aqid

Hi,

May I confirm with you, for the Max 10 DA device, the design can be compiled successfully with the IP? If yes, can you please share with me the design or else, the IP parameters setting such as the sequencer, etc?

Regards,

Aqid