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rt52
Occasional Contributor
Occasional ContributorMAX10 Read Dual Boot IP core values in simulation
I can successfully perform an RSU using discrete logic implementation on a MAX10 device. I now want to confirm that the correct image has been loaded. My board has the CONFIG_SEL pin pulled up so i...
rt52Occasional Contributor
Occasional ContributorQuick Update. I am now able to read from offset 4, after writing bit 0 of offset 2, but it always reads 0x00000001. This is the watchdog timer value, which I do not use or really care about.
