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rt52's avatar
rt52
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

MAX10 Read Dual Boot IP core values in simulation

I can successfully perform an RSU using discrete logic implementation on a MAX10 device. I now want to confirm that the correct image has been loaded. My board has the CONFIG_SEL pin pulled up so i...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Understand, wat about the other bit in offset 2? Have you tried to read them?


rt52's avatar
rt52
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

I have tried to write to offset 2 bit 3 and then do a read from offset 4 and still nothing.

The layout of the documentation isn't clear as to what register is the input register. I see two different sections in the MAX10 configuration user guide. I am reading table 34 for this but there is also tables 9-14 that also have information for the Dual Boot IP but I do not have any of those signals from the Dual Boot IP block that I instantiated.