Honored Contributor
Honored Contributor@Ilik:
To make it short: I think I've done my homework, that's why I've selected the DA option without any need for future flash initalization. The only information I don't know where to get is how much of the FPGA I can use before I run into problems as the image cannot be compressed any more to fit into CFM0 space. Is there any information available that points out some figures like "its getting complicated after reaching 90% logic, memor or interconnect usage" or something like that? Datasheets? AppNotes? Unfortunately the links you provided do not contain such information... As I've planned a migration path I will use the biggest FPGA during development and maybe reduce size later depending on how full the FPGA gets. Thanks for help, tfranke
