rt52
Occasional Contributor
Occasional ContributorMax10 Dual configuration IP read boot source
I am implementing RSU for a Max10M50 using discrete logic. I have components in place to read and write to CFM1&2 through a serial interface. I have instantiated the Dual Boot IP core hoping to be ...
In ug_m10_config.pdf, section " Dual Configuration Intel FPGA IP Core References", you will see that
- config_sel register allows you to select which CFM will be used for next boot
- msm_cs register tells you which CFM was used on last boot
Table 14 gives you de definition of the msm_cs register. I currently use the msm_cs from offset 4 and it seems to work as expected.
