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Altera_Forum
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8 years ago

MAX10 - Spikes at output pins upon startup

Upon starting up the 10M02SCU169 I see a spike at pins assigned as outputs that trying to drive low after configuration. I measured the pins of 1.8V and 3.3V bank and still see a spike on any pin ass...
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Altera_Forum
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8 years ago

Thanks for the reply Anand. I am using the CPLD on our custom designed PCB board. The oscilloscope is using the same ground as the power supply. I just checked and noticed that the spike happens before nSTATUS goes high. So it seems like it happening during the power up state and reset state before the configuration state. All output pins should be in tristate at this time according to the state machine in the Configuring Altera FPGAs pdf.