Forum Discussion
GLB
New Contributor
7 years agoMax10 - Are there internal weak pull-ups on the pins during flash load.
I am working on a new design for the Max 10 10M25SCE144A7G FPGA. I would like to confirm that the device implements an internal weak pull-up on all tri-state pins during flash load of the FPGA code. ...
a_x_h_75
Contributor
7 years agoYes, there are. Refer to table 17 in the MAX 10 datasheet.
"Value of I/O pin (dedicated and dual-purpose) pull-up resistor before and during configuration, as well as user mode if the programmable pull-up resistor option is enabled"
Cheers,
Alex