max v tri-state i/o

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I have a pin which is both an input and an output. In certain clock cycles the block reads the value and in others it drives it.

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Then you would drive the signal with a tri-state that has an output-enable, i.e., in VHDL

bidir <= 'Z' when (enable = '0') else output;

and you can read bidir as an input at any time; when enable = '0' you are reading what is driven onto the pin by the external device, and when enable = '1', you will read what you are driving on 'output'. You can turn on the 'weak pull-up' or 'bus hold' on the pin for bidir so that it is always in a valid logical state.

Cheers,

Dave