Max V JTAG Daisy Chain

--- Quote Start ---

Stupid question: how does a buffer help with reflections? I'll probably go with the same buffer you went with: NC7WZ16P6X. It's quite cheap and tiny.

--- Quote End ---

HDR -> single buffer, and then two series termination resistors on the buffer output to produce two copies of TCK and TMS.

Each of the two series terminated signals will have reflections, but those reflections will occur off the single load at the end of the transmission line. The return reflection will be absorbed by the series termination resistor.

--- Quote Start ---

And if I understood the schematic correctly, I put this between the header and the first CPLD in the chain and the TCK and TMS signals diverge from there on and goes to two CPLDs.

--- Quote End ---

Right, the buffers receive the TCK and TMS signals from the header, and then two copies of each are produced.

I also like to put a buffer on TDI, as a measure of ESD and voltage protection. For the final TDO, its also for ESD protection.

--- Quote Start ---

Or perhaps I misunderstood you. Did you mean to say that I should use a buffer per CPLD? I.e.

TCK from header ----> Buffer# 1 ---> CPLD# 1

TCK from header ----> Buffer# 2 ---> CPLD# 2

--- Quote End ---

There's two ways; a single buffer with dual source termination, or a dual-buffer with two outputs and two series terminations. It depends which TinyLogic buffers you decide to use.

Cheers,

Dave