Honored Contributor
Honored ContributorIm a engineer student from Mexico, im actually learning about CPDL by my self. I have an ALTERA MAX EPM7256SRI208-10 and I download from The ALTERA site the Quartus II and Max+Plus II software. I´ve programmed a very simple schematic example program that I compiled and simulated.
Well I have the USB-Blaster (rev.C) So its only compatible with Quartus II. I configured everything the features for my chip. I bought mi CPLD on electronics store, so its new. The problem is when I tried to program it, the message that Quartus II displays is: " JTAG ID code specified in JEDEC STAPL Format File does not match any valid JTAG ID codes for device." I made a little PCB with the JTAG interface, where the pins are correct and it has the resistences and capacitor well, I connected the chip pins required to VCC= 5 v and ground too. When I click in "auto detect" a message is: "Uncertain JTAG Chain" I think the error isnt in my design or features, but why i cant program the CPLD? the JTAG isnt enable, but, its NEW?? The master programming unit (MPU) will enable this feature (is this the Only way)? Where where I could get a MPU (will you give me a link) ? The MPU is like a universal programmer but for CPLD? Have a nice Day everyone!! I hope answerss :cool:
