Forum Discussion
SoC_Developer
New Contributor
New Contributormax 7000AE not able to use global signal GCLRn as dedicated reset signal pin
Hi,
I am using CPLD EPM7512AEQC208 and trying to port my proven design (working perfectly well on cyclone FPGA). When I compile the project, the reset signal which is pin no 182 in this case, is no...
EngWei_O_Intel
Frequent Contributor
Frequent ContributorHi there
The device you are using, EPM7512AEQC208-7 has discontinued and no longer supported:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pcn/pdn2041.pdf
Also the Quartus version is way too old that later version might have updates that not available in older version.
I will transition the thread to community support. Community users will continue to help you on this thread. Thank you
