Honored ContributorHello all, I am using a MAX 7000AE CPLD. I don't plan on using the GCLK, GCLRn, OE1, or OE2.
What should be done with these unused pins? Left floating or driven to GND? Pull GCLRn up to VCC? I haven't found any information in the datasheet for the device, nor on the dedicated pin-out pdf on what to do with these specific unused pins. Thanks!
Honored ContributorAll four are dedicate input pins. So, don't leave them floating.
From the datasheet: --- Quote Start --- each register clear function can be individually driven by the active-low dedicated global clear pin (GCLRn). --- Quote End --- This implies it is not something you can control inside your design. So, tie this high. My, relatively rusty, first hand experience of this family reminds me that that is the case. GCLK, OE1 & OE2 can be tied to GND. Put your design together and run it through Quartus. The report files will confirm what you're expected to do with all the pins, whether they're used by your design or not. Cheers, AlexHonored ContributorIt never a good practise to leave input pins floating. I dont see a Pin connection guideline (pcg) for Max7000, but there is one for MAXV. Perhaps you can check the PCG if it should be pull up to whatever supply or pull down or direct GND as reference.
Honored ContributorFor Max 7000 unused pins, you can set it from the Quartus II setting. Goto Device and Pin Options, you should be able to reserved all unused pins as output driving ground or as input tri-stated
It is not recommended to leave the pin floating. If the dedicated input or IO pins are left floating, then the input transistors might fall outside of the saturation or cut-off region. As a results, the device could draw additional current and increase the devices' power consumption.
