Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorMax 7000: Epm7064s-5
We've been using an EPM7064S-TC44-5 with an external 100MHz clock for a while but now we have a need to increase the clock speed for our device. From the datasheet, the 7064S-5 has a fmax of 250MHz and a fcnt of 175.4MHz...assuming I understand it correctly, the important max speed is 175.4MHz but you can supply it with up to a 250MHz clock and it'll just run at 175.4MHz. First off, is that assumption correct?
Second - any recommendations on a clock for this? (and where to buy it) Its important that it's a 5V clock also. I've been searching for a good clock solution and so far I'm not finding much. Any thoughts would be very much appreciated. Thanks!5 Replies
Altera_ForumYes, it's somewhat clearer than "highest frequency for pipelined data" in the datasheet.
- Altera_Forum
this solution explains fmax vs fcnt a bit:
http://www.altera.com/support/kdb/solutions/rd04282000_3832.html - Altera_Forum
I'm not completely sure
- You can implement combinational logic at a higher frequency - A non-feedback register can possibly use a clock frequency up to fmax I don't think, that it makes much sense to push MAX7000S to the limits. You most likely won't find a 5V crystal oscillator above 125 or 133MHz and have to use an ECL or LVDS oscillator or a discrete solution with a level translator. Also the dynamic power dissipation is rather high for the 5V node. With recent CPLD, you can achieve fcnt of 200 to 300 MHz. - Altera_Forum
So what's the point of the fmax value given in the datasheet if you need to respect the 175MHz fcnt value instead?
- Altera_Forum--- Quote Start --- but you can supply it with up to a 250MHz clock and it'll just run at 175.4MHz. First off, is that assumption correct? --- Quote End --- Clearly wrong. Synchronous registers must be exptected to stop operation above max fcnt.
