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YDeal's avatar
YDeal
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4 years ago

MAX 10 On-Chip Flash IP core read incorrect data

I use the Quartus Prime Standard 17.0.2 (Certified Version) and I observe random failure on read access on On chip Flash IP. The design is implemented on 3 différents MAX10 FPGA and only one have ...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi Deal,


Are all three device have different bitstreams? If yes,

What I ccan think of is, assuming timing is clean, can you try to use other bitstream and program the device and see if flash read still behaves incorrectly.


How did you read the data from? Using nios?