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Altera_Forum
Honored Contributor
8 years agoMax 10: Lvds
I do like to have such a functionality in my design that could detect presence of data on LVDS lines and assert a flag. And in case no data is being received it can deassert the flag. I am using MAX-...
Altera_Forum
Honored Contributor
8 years agoDoes it mean that there always would be some voltage at the differential lines? resulting in logic 1 or 0 at receiver?
Also please correct me if I am wrong but I thought CRC and checksum are for error detection in bit stream. I am more interested to know when the first bit arrives via LVDS, so to be able to latch it accordingly.