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Altera_Forum
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8 years ago

MAX 10 fails to run JTAG loaded SOF

I have run into an odd problem with a new board that has a Max 10 10M50SA FPGA on it. (Specifically, the 10M50SAE144) The JTAG port appears to work, I can auto-detect the FPGA correctly, and Qu...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Look at the nCONFIG/nSTATUS/CONF_DONE pins. If you don't have pullups on them, that's maybe your problem. If you do, nSTATUS/CONF_DONE should tell you how things are progressing.

If your only way of talking to your design to know its running is via the JTAG port, have you accidentally disabled it (assigned the pins as I/O) in the design. This is easy to do by mistake - if you are intending to use JTAGEN to give you the option of using the pins as I/O in the future but haven't defined the pins in your design as you aren't using them yet, you will get unused I/Os assigned to the pins and no JTAG regardless of the state of JTAGEN.