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EGrin3's avatar
EGrin3
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5 years ago

MAX 10 (10M08SAE144) ADC: Vref at 2.5 V, and VCC_ONE at 3.3 V

Hi,

Table 34 (ADC Performance Specifications for Intel® MAX® 10 Single Supply Devices) in the MAX 10 FPGA Device Datasheet specifies an external reference voltage (Vref) for the ADC from (VCC_ONE - 0.5V) to (VCC_ONE).

https://www.intel.com/content/www/us/en/programmable/documentation/mcn1397700832153.html#mcn1397985049075

We are designing the 10M08SAE144 into some of our products. When we looked at the "MAX 10 10M08 Evaluation Evaluation Kit" (EK-10M08E144), for reference, we discovered that in this design Vref = 2.5 volt, and VCC_ONE is 3.3 volt. This contradicts the requirement of Vref being no more than 0.5 volt below VCC_ONE (in this case it is 0.8 volt below!).

Can anyone come up with a good explanation as to why the development kit is not made in accordance with the device datasheet?

What are the consequences/risks in violating this datasheet requirement?

Is this simply an error in the datasheet?

Erik

PS: This is exactly the same question that was posted here last fall by someone else, but received no proper answer:

https://forums.intel.com/s/question/0D50P00004Pv5IISAZ/max-10-adc-vref-25v-with-vccone-33v

5 Replies

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
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    5 years ago

    Thanks Erik for your inquiry.

    Do you mean you have the measurement of Vref and Vcc_one from the "MAX 10 10M08 Evaluation Evaluation Kit"? Or you found discrepancy on the user guide doc versus the datasheet doc?

    Regards

    Eng Wei

  • EGrin3's avatar
    EGrin3
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    Thanks for getting back to me.

    We want to utilize the ADC of the 10M08SAE144. We are considering to use a reference voltage on the ADC_VREF pin of 2.5 volt - this is the same voltage that is used in the "MAX 10 10M08 Evaluation Evaluation Kit" design. Note that in this design the VCC_ONE pin is at 3.3 volt. So far, so good.

    The problem is that in Table 34 (see link above) it is stated that "External reference voltage" for the ADC should be between VCC_ONE – 0.5 and VCC_ONE. This translates to between 3.3-0.5 = 2.8 volt and 3.3 volt. Since a reference voltage of 2.5 volt (like in the eval kit) is outside of this range, this choice of reference voltage appears to be in conflict with the datasheet (Table 34).

    This contradiction forms the basis for my questions:

    1) Can anyone come up with a good explanation as to why the development kit is not made in accordance with the device datasheet?

    2) What are the consequences/risks in violating this datasheet requirement?

    3) Is this simply an error in the datasheet?

    Erik

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
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    5 years ago

    Hi Erik

    Per our understanding on the datasheet, Vcc_ONE – 0.5 for the Vref (min), is referring to Vcc_ONE(min) - 0.5 which is 2.35V.

    Please let us know if you are seeing issue while applying the power rating.

    Thanks.

    Eng Wei

    • EngWei_O_Intel's avatar
      EngWei_O_Intel
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      5 years ago

      Hi Erik

      Do you have any further question regarding this topic?

      Thanks.

      Eng Wei

      • EngWei_O_Intel's avatar
        EngWei_O_Intel
        Icon for Frequent Contributor rankFrequent Contributor
        5 years ago

        Hi Erik

        We do not receive any response from you to the previous reply that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

        Eng Wei