matrix array in vhdl

That's the problem when using abstract data types like integer. You can use them in hardware design, but you should know what you are doing. By default, integer is a signed 32 bit quantity, thus each integer array element is infered as signed(31 downto 0). It's easy to calculate the amount of port bits needed to represent the array.

To learn about reasonable usage of the integer type in hardware designs, you can review the Quartus VHDL binary counter template. Generally you need to constrain it by setting a range in the type definition.

My personal opinion is, that you should better use signed or unsigned types for the top entitie's port. Altough the port is represented by a bit_vector, you can't access individual bits without type casting the signal, because integer abstracts from it. Somewhat confusing, I think. Integers are however appropriate for internal signals.