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Altera_Forum
Honored Contributor
Honored ContributorMaking a counter from 50MHz Clock?
Hi,
I know this might be a really silly question but I can't seem to get the theory down into HDL: I want to make a 3579545Hz clock from a 50MHz clock input: i know that --- Quote Start --- 1/3579545 = 2.7936511484001458285899464876123e-7 Multiply that by 1000,000 and get 279.36511484001458285899464876123ns --- Quote End --- :D but how i use this info to make a clock? that's another story. I've tried just using a PLL, but it didnt like my desired output. I'm thinking it was in the wrong format but i don't know for sure. In the megawizard, i told it that my input clock was 50MHz. the output could only be in MHz ps or ns. of course it did not like my desired output saying that tthe requested multiply/div factors were not achievable. could someone please help? P.S. I tried reading the ALTPLL.pdf but it was very hard to do14 Replies
Altera_Forum--- Quote Start --- Have you thought of an accumulator like that in an NCO (i.e. DDS) that adds 3579545 modulo 50 million. The MSB becomes your required rate. It wouldn't be dead regular but it might be good for your device. --- Quote End --- I've never even heard of such a thing. Do i google "Accumulator DDS"?- Altera_Forum
Have you thought of an accumulator like that in an NCO (i.e. DDS) that adds 3579545 modulo 50 million. The MSB becomes your required rate.
It wouldn't be dead regular but it might be good for your device. - Altera_Forum
the device i want to emulate: the SN76489 has a 3579545Hz clock
- Altera_Forum
why do you need a very specific frequency? The 50MHz clock probably isnt accurate enough in the first place (a few ppm error, so could actually be about 49.99MHz or 50.01) so creating a specific clock like yours wont be very exact
