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Altera_Forum
Honored Contributor
17 years agoMaintaining hierarchical names while doing timing simulation
Hi, I am running post place and route (timing) simulation in ModelSim. But all the wire and register names are modified and difficult to figure. How to maintain all the component names w...
Altera_Forum
Honored Contributor
17 years agoHi Akshay,
You can tell the eda netlist write to maintain the hierarchy but the signal names will be weird anyhow. Use Assignments > EDA Tools Settings... > Simulation > EDA Netlist Write options > More Settings > Maintain hierarchy. Harald