Forum Discussion
Occasional ContributorLvds Rx receiver latency
Hello,
You can refer more information for the LVDS SERDES Intel® FPGA IP Receiver Settings:
https://www.intel.com/content/www/us/en/docs/programmable/721819/24-2/receiver-settings.html
For the Bitslip rollover value, you can specify the maximum latency for the bit slip to inject.
Regards,
Aqid
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