LVDS and Arria II Gx

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Let's say I have a differential LVDS clock connected to a differential clock input. In the datasheet, it is written that "Arria II GX clock input pins (CLK[4..15]) do not support OCT".

What does this mean? Does this mean I have to physically place a 100-ohm resistor between the 2 pins to have a proper LVDS reception?

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Yes, you have to place the termination resistors on the board. If you are using a 1mm-pitch BGA package, then an 0402 resistor fits perfectly between the pins of the BGA. You simply need to get the PCB manufacturer to epoxy fill the BGA via before the final plating stage, so that there is no hole in the via, and you can place the 0402 pads on top of the BGA vias.

You can look at an example of this by looking at the Allegro PCB design files here (using the free Allegro viewer):

http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/%7edwh/carma_board/)

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Also can LVDS work without having resistor placed at the Rup and Rdown pins? I ask because I plan to use bank 6 for LVDS reception but I can't seem to find the associated Rup and Rdown pins.

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The Rup/down pins are for calibration of the on-chip terminations ... if you don't have OCT, then you don't need Rup/down. Of course, there may be some pins that do support OCT, and in that case, you will need the associated Rup/down resistors for those pins.

Cheers,

Dave

Thank you for your answers.

But say I want to use RD OCT for LVDS, then I need to connect a Rup to 2.5V and a Rdn to ground right? What If there are none in bank 6, which Rup and Rdn should I choose? There are only 3 such pairs in the Arria II Gx 780 pins.

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But say I want to use RD OCT for LVDS, then I need to connect a Rup to 2.5V and a Rdn to ground right? What If there are none in bank 6, which Rup and Rdn should I choose? There are only 3 such pairs in the Arria II Gx 780 pins.

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Implement a design in Quartus and see what it does. If it selects Rup/Rdn in another bank, then you know that is one option. Try explicitly assigning Rup/dn to the bank Quartus selects and re-run P&R (it should succeed). Now try using other Rup/dn banks to see if there is a restriction on the banks you can use.

Its much easier to use Quartus to check for P&R violations - just make sure to use the most recent version of Quartus (or try several versions).

Cheers,

Dave

Thank you for your answer but I spoke with an Altera FAE, and for LVDS, we do not need to use the Rup and Rdn pins for LVDS OCT. We only need to connect VCCPD and VCCIO to 2.5V.

Also not all pins support OCT on LVDS.

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Thank you for your answer but I spoke with an Altera FAE, and for LVDS, we do not need to use the Rup and Rdn pins for LVDS OCT. We only need to connect VCCPD and VCCIO to 2.5V.

Also not all pins support OCT on LVDS.

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Thanks for the feedback.

Did you try using Quartus? It would have essentially told you the same thing. This saves having to ask an FAE too.

I would double-check the VCCPD advice. In the Stratix II design here:

http://www.ovro.caltech.edu/~dwh/carma_board/

I used a lot of LVDS, but VCCPD was connected to 3.3V.

I have not used the Arria II devices. Review the recommendations for VCCPD.

Cheers,

Dave