Forum Discussion

malayali's avatar
malayali
Icon for New Contributor rankNew Contributor
3 years ago

LRDIMM DDR4 Failure to write was encountered on Arria10 FPGA. Please share your ideas.

Hi, I work as a hardware designer. In my design, I used an Arria10 FPGA and an LRDIMM DDR4 module. I connected an FPGA to a processor using PCIe x8. The procedure is as follows: the FPGA receives c...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi!


I'm Adzim from Intel Support will assist you in EMIF area.


First of all, please check the memory module and device are working properly.

You can generate an EMIF Example Design to test the memory device.


Please take a look at the timing report after the design is compiled. If there are some timing violations occurred, then the design need verify for fixing the timing issue first.


There is an PCIE example design for Arria 10 device that I think you can use for debugging purpose.

So you can check if the write and read can be performed through the DMA.

You may visit Intel FPGA Design Store to get the Design Example.

Intel FPGA Design Store: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?q=pcie&s=Relevancy&f:guidetm83741EA404664A899395C861EDA3D38B=%5BIntel%C2%AE%20Arria%C2%AE%3BIntel%C2%AE%20Arria%C2%AE%2010%20FPGAs%20and%20SoC%20FPGAs%5D



Regards,

Adzim