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Altera_Forum
Honored Contributor
15 years agolpm_ff megafunction
I am analyzing an old design of an FPGA that looks like it is clocking data in with the lpmFF megafunction set up as a D flip flop. But looking at the input data with an analyzer, the input data goe...
Altera_Forum
Honored Contributor
15 years agoI was looking into the lpm_shiftreg megafunction and am a little confused.
I basically want to delay a 16-bit input to a multiplier by 5 clock periods. I did not find any option in the MegaWizard for lpm_shiftreg to set the desired time delay. Any help will be appreciated.