Looking for detailed Performance Data for Altera’s MMU and MPU

For all those developers who have employed the Nios II with its MMU (or MPU) …. I am looking for performance data for the NIOSII when the Altera MMU and / or MPU is being employed.

Any information in this regard is very welcome. For example, best/worst case performance for various operations (such as a ITLB hit / miss, Unified TLB hit/mis, etc) would be useful.

Thanks,

Benjamin