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JBenj's avatar
JBenj
Icon for New Contributor rankNew Contributor
7 years ago

Load from EPCQ fail

I have a Cyclone V FPGA connected to an EPCQ128 as depicted in the standard configuration for the device. I am able to load the .jic file and the .sof file but whenever I kill power to my board and r...
Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi,

Did you scope the nCONFIG, nSTATUS and CONF_DONE signal when power up? Is the nSTATUS signal stay high all the time after nCONFIG goes high? Or did the nSTATUS signal toggle? Is the CONF_DONE signal is directly pull up to the VCCPGM via 10kohm? If you have any other component such as LED or external host connecting to the CONF_DONE, remove those component. Potentially these extra component can hold the CONF_DONE low. Ensure the CONF_DONE signal is connected to VCCPMG via 10kohm pull up.

Regards,

Nooraini