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emrahener's avatar
emrahener
Icon for New Contributor rankNew Contributor
3 years ago

Limit PCIe speed to Gen2

Hi, I am using Multi Channel DMA Intel® FPGA IP for PCI Express IP on a Agilex device to implement a x16 PCIe EndPoint. Due to some problems I want to change the advertised speed to Gen2 form Gen3....
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Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Can what IP parameter does not allow you to do so ?

My suggestion is regenerate a new design example for pcie gen3.

Is any printscreen that you can show to me ?


Regards,

Wincent_Intel