LE and memory blocks in a cyclone

Hello,

I'm quite new in the world of the FPGA, indeed, I'm an engineer student in end-of-studies internship which is about using a FPGA.

Well, I'm telling you that because I guess that you will think my question is a question of newbies :oops:.

When I start studying FPGA, my teachers said that the most important characteristic of these devices is the number of Logic Elements.

But during my internship, I did some architectures using IP and then, after a full compilation, I realized that the characteristic which constrained me the most is the "total memories bits".

After few research, I understood this characteristic was the representation of the memories blocks (like M9K).

Here come my question, what is the constitution of a memory block? is-it a very important parameter in a fpga?

Example:

My FPGA have 600K memories bits and 22K LE.

After Quartus compilation, I realize that my architecture need 500K memories bits but only 2K LE.

can i use le instead of memories block for 1 or 2 ip?

I hope that I explained my problem clearly,

Thank in advance,

Clément.