Be careful saying DLL on an FPGA board, as everyone thinks Delay Locked Loop first. I thought the Signals and Probes could be accessed via a Tcl interface, but it's through a Quartus shell. I know the VJI(Virtual JTAG Interface) has a Tcl interface, as I've written scripts to access it. Of course, the VJI requires some writing of hardware too. I don't know if that's enough to do what you want. (Also, I think many designers put a small Nios in their system, use one of it's I/O interfaces to talk to a machine, and then are able to access a processor from a machine while also runnign code in the FPGA. This may be more than what you're looking for.)