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Altera_Forum
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8 years ago

JTAG connection issue

Hi all, I have a board that configured the Cyclone 4 E device JTAG signals with 2.5V with 100 ohm series resistor on all signals and TMS, TDI pulled up to 2.5V through 2.2k resistors. I ob...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Sorry, I didn't get the 1V TDO low level point. I won't rate it unstable, the 1V level is rather stable. It's unlikely to be caused by the FPGA or the USB Blaster. Data contention should never happen in a correctly designed JTAG chain, the USB Blaster has no means to cause it at all (TDO is input only). Defective parts are a possible explanation, but more likely it's a design fault or wrongly dimensioned resistor.

We need to look at the board schematic details. Is it a development kit (which one) or a custom design?