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Altera_Forum
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11 years ago

jtag configuration by external processor

hi, i'm trying to configure altera fpga using a external processor, Raspberry pi to be more specific, the openocd running on the raspberry pi can identify the EP4CE6 fpga now. But I encounter som...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Can I ask why you are trying to configure the FPGA via JTAG from your processor rather than using the slave serial/parallel options that are intended for this purpose? Is this an academic exercise or this a real application on real hardware?

The JTAG spec is not something Altera have put together, it's a standard supported by Altera devices. See: 1149.1-2013 - ieee standard for test access port and boundary-scan architecture (http://standards.ieee.org/findstds/standard/1149.1-2013.html)

Cheers,

Alex