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Altera_Forum
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14 years agoJTAG chain debugger tools scripts & JTAG clock management
Hi everyone, For a design tests, I'm planning to implement this design to a Cyclone II FPGA (integrated to a DE1 board). I then would like to apply stimuli on DUT inputs via the JTAG chain an...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- Can you explain the difference between the device_dr_shift and device_virtual_dr_shift procedures, and between the device_ir_shift and device_virtual_ir_shift procedures? --- Quote End --- device_ir_shift shifts bits into the real JTAG IR register. device_virtual_ir_shift shifts bits into a shift register implemented using logic elements in the FPGA fabric. This shift register is accessed by first shifting an instruction into the real JTAG IR register, and then shifting the Virtual instruction into the DR register. If you look at the SignalTap traces in that document and the Avalon Analysis document, you'll see the real JTAG IR instructions that correspond to accessing the Virtual JTAG IR and DR (which are loaded using JTAG shift-DR sequences). --- Quote Start --- I understand the virtual procedures are higher level, but are they safer to use? Why use the virtual ones instead of the low-level ones? --- Quote End --- Read vjtag.pdf again. The Virtual JTAG instructions can be constructed using low-level JTAG instructions. However, you have to know the encoding, so that you can generate the correct JTAG Shift-IR sequence followed by the JTAG Shift-DR sequence needed to implement a Virtual Shift-IR or Shift-DR sequence. That encoding depends on the number of JTAG nodes in the design, and so to determine the encoding you first need the HUB_INFO and NODE_INFO for each node in the JTAG design. The JTAG-to-Avalon-MM bridge example contains a JTAG script for quartus_stp that implements all of the JTAG commands you are interested in. Cheers, Dave