JTAG and/or IO pin usage

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I'll just treat the JTAG port as if it's always a JTAG port then

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That is generally the best way to do things.

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I want to get rid of the header & connect some uC IO to the CPLD with the same uC IO doing JTAG-y stuff as well as mode selection for my user code.

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In that case, check out the JTAG-y stuff in this schematic:

http://www.ovro.caltech.edu/~dwh/carma_board/gda06rb004_carma_v0.87_dec03.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/gda06rb004_carma_v0.87_dec03.pdf)

Why are you thinking of using this particular CPLD?

The MAX II devices are much nicer, eg., EPM570 in a TQFP 100 package. When I want a little glue logic, I find that one quite handy. The schematic I just referenced to uses a couple of them.

Cheers,

Dave