Altera_Forum
Honored Contributor
14 years agoIssue with conf_done hosing a Cyclone IV
In a nutshell, it appears that something related to the conf_done pin is borking my FPGA post bitload.
Background: I'm programming a Cyclone IV via a micro using PS mode. The conf_done pin goes from the FPGA to an input on the micro where it is monitored to ensure programming takes place successfully. The required 10k pullup to Vcc (3.3V in my case) is in place. The conf done line is also used to drive the ~OE inputs of two SN74LVC1G125 chips, putting them into tri-state mode when conf_done is released and pulled up. Problem: Conf_done releases as expected once the bitload is finished, but the FPGA never starts up to perform its function. Adding a tiny bit of capacitance on the conf_done line (scope probe, finger, 18pf cap) fixes this issue and the FPGA starts up just fine. Removing the buffer chips from the net also solves the issue, but I'd prefer to drive them with this line if at all possible, and I don't see why an output from the FPGA could be hosing it like this. Any suggestions? Thanks