Forum Discussion
Altera_Forum
Honored Contributor
16 years agoi've found it.
Thank you so much. It is in verilog language. My project is in vhdl language. Can i mix vhdl and verilog files in my project?i've found it.
Thank you so much. It is in verilog language. My project is in vhdl language. Can i mix vhdl and verilog files in my project?