Forum Discussion
Altera_Forum
Honored Contributor
18 years agoYou're right. I haven't been back-annotating.
When I tried to back-annotate, it recommended writing vqm file instead. I tried the vqm route and I tried the back-annotate route. With my EP1C6 design it seems to generate different files a lot! Even just back-annotating and then recompiling with no other changes, the rbf/ttf output files are different! I think I will explicity drive these outputs to ground from within the VHDL. I would prefer my unused pins default to input with weak pullup. (safer default!) Hopefully the IO is just "as good a ground" with this approach. I can't see any reason they wouldn't use the same transistor for both data and SSN grounding functions ... unless the SSN transistor is bigger/slower/lowerRDSon ... hmmm Oh well. If anyone knows ... I'm listening. Thanks Steve