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Altera_Forum's avatar
Altera_Forum
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14 years ago

Is it possible to DIY a SATA/USB/DDR controller

To all FPGA Gurus,

Is it possible to study and design the controller for SATA2/3, USB2/3 and DDR2/3 in 2 months, without using the extremely costly IP core with time limit?

I just realised that a good SATA3 IP core somehow cost 3x higher than the DE4v530. Honestly, it is heart breaking.

Because it seems that if the company folks can do it, why not ourselves?

Does anyone experience/knowing where to get the resources of the functional block diagram or the operating sequences of these high speed interfaces?

(I don't believe I can't make it from scratch, though :p)

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    > in 2 months

    no you can not.

    > where to get the resources of the functional block diagram

    search in opencores

    http://opencores.org/projects

    you know that we are fighting against TIME.

    you do your job ( creating applications )

    they do theirs ( supporting interfaces )
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    2 months seem very unrealistic, to say the least. Even if you already knew the protocols by heart and worked day and night, you would still need to test the cores in all kind of situations. In those kind of cores the test and certification phase is a lot longer than the actual development.

    Those complex cores are expensive for a reason, and I fear it would cost more to do it yourself.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    IP is expensive since a lot of effort goes into creating it. SATA and SDRAM controllers are not easy to create from scratch. USB it depends what you are interfacing with. Some external USB chips provide you a simple bidirectional bus that wouldn't take long to make a controller on the FPGA side to talk to it. If you are looking to create a USB host then that's a different story.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    To all FPGA Gurus,

    Is it possible to study and design the controller for SATA2/3, USB2/3 and DDR2/3 in 2 months, without using the extremely costly IP core with time limit?

    I just realised that a good SATA3 IP core somehow cost 3x higher than the DE4v530. Honestly, it is heart breaking.

    Because it seems that if the company folks can do it, why not ourselves?

    Does anyone experience/knowing where to get the resources of the functional block diagram or the operating sequences of these high speed interfaces?

    (I don't believe I can't make it from scratch, though :p)

    --- Quote End ---

    Hello everyone.

    Some years ago there was an open-source project implementing an USB client (USB 1.1, 1.2 MBit low-speed only) on the GPIO lines of an 8-bit microcontroller.

    For me this means implementing an USB core should not be too time intensive if you are already familiar with USB internals (these can be downloaded but you need a lot of time reading and understanding it).

    Martin