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Altera_Forum
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12 years ago

Is it feasible to use the GPIO of Cyclone IV to generate a 148.5MHz clock signal?

Hi, I am new to Altera FPGA Forum. I managed to design a video signal source by using the Altera FPGA for generating test signals. It would send a 1080p60 digital video signal in BT.1120 ...
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Altera_Forum
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12 years ago

Hi Pete (anakha),

Thank you for your reply!

Yes, I did find the IO speed specification of Cyclone II in cyclone ii handbook, while such a specification is absent for Cyclone IV in cyclone iv handbook. That's why I tried to post this thread. And yet I don't think there would be any difficult for a 45nm-Cyclone to generate a 148.5MHz external clock output.

Actually, I am trying to verify my design by using a Cyclone II Evaluation Module these days first. And we may get a Cyclone IV EVM in a few days.

Again, thank you for your help!

Naroah

Feb/22/2014