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Altera_Forum's avatar
Altera_Forum
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8 years ago

IOBuff Usage

Hi, I have input to output direct mapping in my design. I am not able to time close it to 5ns because of IC Delay. input is in 3.3 V domain: set_instance_assignment -name IO_STANDARD "3....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Where are the delays? Again, did you check the Chip Planner or Extra Fitter Info tabs to see what physical constraints are leading to such a large delay? In your detailed timing report, where are the largest incremental delays (reported on the Data Path tab)?

Posting screenshots of your timing report(s) may help.