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Altera_Forum
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8 years ago

IOBuff Usage

Hi, I have input to output direct mapping in my design. I am not able to time close it to 5ns because of IC Delay. input is in 3.3 V domain: set_instance_assignment -name IO_STANDARD "3....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi sstrell,

Actually I removed a mux in the path to get the best result(still I cant time close the design!).

Pin placement is on the diagonal ends of the device(B18 and R1 for example) and it cannot be changed as board is already designed.

My device is just 10% full. Device is Cyclone IV E - EP4CE55F23C8. I am surprised to see the pin to pin delay of ~10.5 ns.

Am I missing any techniques to time close this particular path?

Thanks,

Neeraj