Forum Discussion
4 Replies
- Altera_Forum
Honored Contributor
you will need to compile the generated code in quartus. Before this you need to setup a project and define all the pinout etc before compiling.
A few years ago simulink had support for some xilinx dev boards to make the above setup easier, and they were planning to support some altera boards too. Maybe it's worth looking into the altera dev board support - but you'll need to ask mathworks. - Altera_Forum
Honored Contributor
Thanks for your explanation. How about the memory if we like to use SDRAM too? Do you know about it? Thanks in advance.
- Altera_Forum
Honored Contributor
If you need to interface to an SDRAM, you'll need to drop in an SDRAM controller yourself. You can get the IP from Altera, but you'll need to connect it to your generated HDL.
- Altera_Forum
Honored Contributor
Thanks for your explaination