Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributorinterface with DDR external memory using IP-core
Hi all! I'm working with Cyclone V, my aim is to use DDR memory. Am I right that I need to create my own controller and use ALTDQ_DQS2 IP Core as PHY? I mean that Altera removed support of DD...
Altera_ForumHonored Contributor
Honored ContributorCorrect, Altera DDR controller is not supported on Cyclone V.
If this is a new design, my suggestion would be to use Cyclone V with Hard Memory Controller and select a compatible memory device.
