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Hello Sir,
Thanks for the reply. u r right they are all in different files viz cir1.vhd,cir2.vhd and cir3.vhd. Now u mentioned the entities at the top of the code for both cir1 and cir2.will i need to just declare the entities there or also the architecture as well?
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no, you dont need the entites at the top of cir2.vhd. They were just there to illustrate the port maps.
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So basically i shall write a new code for cir3 viz- cir3.vhd and follow the steps stated by you. also, as to "entity work.cir1" - this means that we need all the 3 vhdl files in the same work directory,right sir?
Thanks,
Vinod.
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they dont need to be the same working directory, just compiled into the same library. In VHDL the default local library is called "work".
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