Forum Discussion

Oyvine's avatar
Oyvine
Icon for New Contributor rankNew Contributor
5 years ago

Intel MAX10 LVCMOS and LVTTL Drive strength limitations

Hi, I am working on a gate driver design using the Intel MAX 10 10M08SAU169I7G. The FPGA is driving the signals G1_high and G1_high_inv in the attached schematic. The supply rail available (so far)...