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jasmel's avatar
jasmel
Icon for New Contributor rankNew Contributor
3 years ago

Intel MAX 10 FPGA doesn't support LVTTL at 3.3V with a VOL (max)= 0.40V??

Hello We would like to use the Intel MAX 10 FPGA to drive a 3.3V LVTTL as a JESD8-B. But the datasheet doesn't show that compatibility: VOL(max) = 0.45V, which do NOT follow the JESD8-B requirement...
Mengzhe's avatar
Mengzhe
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hi,


Considering your design need to support Jedec JESD8-B or C, I think whether 0.45 V of VOLmax works depends on the opposite end.

If the other end supports LVTTL 3.3V, refer to JESD8-B/C, VILmax is 0.8 V, which is higher than 0.45 V.

To make sure your design works, you can run simulation to check if VIL meets VILmax.


Best Regards,

Mengzhe