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jasmel's avatar
jasmel
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3 years ago

Intel MAX 10 FPGA doesn't support LVTTL at 3.3V with a VOL (max)= 0.40V??

Hello We would like to use the Intel MAX 10 FPGA to drive a 3.3V LVTTL as a JESD8-B. But the datasheet doesn't show that compatibility: VOL(max) = 0.45V, which do NOT follow the JESD8-B requirement...
jasmel's avatar
jasmel
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3 years ago

Hello Frank.

Our design need to support Jedec JESD8-B or C, when driving a low level at 8mA and with a VOL(Max) =<0.40V. The table shows a higher value at 0.45V.

Where in the IBIS model does it show the VOL(Max) related to a drive level for the MAX 10 FPGA?

Currently, the documentation doesn't that information, and we can not rely on it.

Thanks