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jasmel's avatar
jasmel
Icon for New Contributor rankNew Contributor
3 years ago

Intel MAX 10 FPGA doesn't support LVTTL at 3.3V with a VOL (max)= 0.40V??

Hello We would like to use the Intel MAX 10 FPGA to drive a 3.3V LVTTL as a JESD8-B. But the datasheet doesn't show that compatibility: VOL(max) = 0.45V, which do NOT follow the JESD8-B requirement...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
3 years ago

Hello,
I wonder what's the actual design problem? The Jedec document reflects the necessity to fix certain numbers in a standard, not more. According to Ibis files, MAX10 keeps 0.4V@4mA with LVTTL 4 mA IO-standard. The 0.45 V number is apparently adding some worst case margin. If you feel that LVTTL 4 mA drive strength is insufficient for your actual load condition, use LVTTL 8 mA.

Regards,
Frank