Intel® SoC FPGA Bare-metal Developer Center

Hi Tarun-fiction,

I do not know the script provided still working with the later baremetal project creation. I think you can refer to this document to start with cyclone V baremetal, refer to the section Cyclone V Bare Metal Example Using SoC EDS Standard Edition:

https://www.rocketboards.org/foswiki/Documentation/SoCEDS

The u-boot-with-spl.sfp to initialize the ddr for your application will run on it.

Try one of those examples application design to run with.

Thanks.

Regards,

Aik Eu

Hi Tarun-fiction,

I will close the thread if no further question.

Thanks.

Regards,

Aik Eu

Tnq Aik,

I can make and run bare metal program through managed make based project creation method,

just wanted to know how we can make bare metal program through script provided by intel

because it can create others files also along with creation of projects.

Request from my side is if anyone know how to run that script and create project, pleas share it.

Tnq

Hi Tarun-fiction,

As I understood previously, that documentation was quite old and I have checked with the team and understand that the script is not relevant anymore. But most of the functionality was included in the bare-metal hwlibs at https://github.com/altera-opensource/intel-socfpga-hwlib, see the folder ‘examples’.

The configuration is done from the Makefile parameters, check also the readme files. See https://www.rocketboards.org/foswiki/Documentation/HWLib.

Thanks.

Regards,

Aik Eu

Hi Tarun-fiction,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu

Hi Tarun-fiction,

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Thanks.

Regards,

Aik Eu