It depends of how you write your testbench.
1. You can write a counter in your testbench in VHDL which feeds the input of "adder_integer"
2. You can write a macro
macro_adder_integer.do (simple text file) which looks like :
# increase "astring" from 0 to 15
for {set inc 0} {$inc <= 15} {incr inc} {
# generate stimuli
force -freeze sim:/adder_integer/astring 0 10#$inc#
# simulate
run 20 ns;# arbitrary value since you don't have clock in your design (typically 50Mhz)
}
And then in modelsim prompt, type
do macro_adder_integer.do ModelSim Macros are in TCL langage
3. type
force -freeze sim:/adder_integer/astring 0 10#0#
run 20 ns
force -freeze sim:/adder_integer/astring 0 10#1#
run 20 ns
...
force -freeze sim:/adder_integer/astring 0 10#15#
run 20 ns :-D