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Altera_Forum
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14 years ago

Instantiating Arria ii half-dsp block

Hi, I've got a semi-parallel FIR design that would map nicely into a cascade of Arria ii Half-DSP blocks, and would like to instantiate the Arria ii Half-DSP block in my VHDL code. I don't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi - thanks for the info.

I've looked thru the templates, and they all seem pointed at a particular sub-function of the block, i.e. a muliplier, a multiply add or multiply-acc function.

None of them seem to expose the chain_in/chain_out feature that I need for cascading half-dsp blocks for a FIR filter. This is shown in the Arria ii handbook in figure 4.5 - the half-dsp block diagram.

How can I get a VHDL template that corresponds to figure 4.5? Without a template it seems like I will need to attempt to model the half-dsp block in VHDL and modify it until the Quartus synth tool agrees that all the functionality can be placed in a single half-dsp block. This can be very time consuming.

THanks,